Doulos on LinkedIn: #doulostraining #ai #edgeai (2024)

In this Doulos KnowHow tip, Doulos Founder and Technical Fellow John Aynsley explains the Machine Learning tool flow for Edge computing, then walks through an example using TensorFlow lite. Watch here: https://lnkd.in/emaC82RNEdge computing enthusiasts may also be interested in our upcoming live webinar, Video Analytics at the Edge on Friday, September 6: https://lnkd.in/eDByWxYw#DoulosTraining #Doulosondemand #Python #MachineLearning

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Doulos is delighted to be presenting 2 training sessions at the upcoming Verification Futures Conference in Austin (USA). This event will be held on Thursday, September 12 with both physical and virtual access. The conference is focused on hardware design verification.In the second training session "Practical Hacks for SystemVerilog Coverage", Doulos Senior Member Technical Staff, Doug Smith will cover: ✔ Tips for handling limitations in SystemVerilog coverage✔ Coverage constructs to avoid✔ Recent additions to coverage in the latest 1800-2023 LRMRead full description: https://lnkd.in/ebRPw3nARegister to become a part of this event in person or online: https://lnkd.in/gCZ6zHgg#VF24 #verification #verificationconference #verificationfutures2024 #SystemVerilog #semiconductor #Tessolve

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This Friday’s webinar: Common Mistakes in VHDL📅 August 30⏰ Europe & Asia: 10am (BST) & Americas: 10am (PDT) Learning any new programming language will undoubtedly be influenced by your existing design experience, and although that knowledge is largely very useful it can also work against you... For example, when you come to learn VHDL, the parallel nature of the hardware design language might trip you up if you've been using a language that has a sequential nature, such as Java, C or C++.In this webinar, we explore some of the common mistakes designers make when starting out with VHDL and provides useful tips and resources for getting on track.Find out more & register: https://lnkd.in/e3dhnwRE #webinar #trainingwebinar #VHDL #doulostraining

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Tomorrow’s webinar: Managing Devices with Linux Device Drivers 📅 August 28⏰ Europe & Asia: 10am (BST) & Americas: 10am (PDT)In this webinar we investigate the why and how of managing peripheral devices in a RISC-V based embedded Linux system, including the steps involved in writing a device driver. Find out more & register: https://lnkd.in/e_MRHBpE Webinar partner: Microchip Technology Inc. Presenter: Simon Goda #webinar #trainingwebinar #linux #devicedrivers #doulostraining

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Doulos is delighted to be presenting for the first time at 𝐍𝐃𝐂 𝐓𝐞𝐜𝐡𝐓𝐨𝐰𝐧 -an annual conference focusing on C++ and software development for products. It takes place from 𝐒𝐞𝐩𝐭𝐞𝐦𝐛𝐞𝐫 9-12 𝐢𝐧 𝐊𝐨𝐧𝐠𝐬𝐛𝐞𝐫𝐠, 𝐍𝐨𝐫𝐰𝐚𝐲.https://lnkd.in/ebYrX4CZ#ndctechtown #DoulosTraining

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Doulos is delighted to be presenting 2 training sessions at the upcoming Verification Futures Conference in Austin (USA). This event will be held on Thursday, September 12 with both physical and virtual access. The conference is focused on hardware design verification.In the first training session "Signing Off with Formal", Doulos Senior Member Technical Staff, Doug Smith will cover: ✔ What makes a good formal sign-off methodology✔ Various types of coverage in formal✔ Interpreting coverage resultsRead full description: https://lnkd.in/eJYhPkkpRegister to become a part of this event in person or online: https://lnkd.in/gCZ6zHgg#VF2024 #conference #verification #verificationfutures2024 #semiconductor #Tessolve #formalverification

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KnowHow Webinar: Video Analytics at the EdgeWith AI models based on a convolutional neural network (CNN) enabling valuable insights from video or image data, and with the availability of low-power neural network accelerator hardware - the exciting opportunities for using vision at the edge are now thriving!This webinar will explore:✔ Applications that use video analytics at the edge✔ Deep learning models for inferencing✔ Composition of a typical video pipeline✔ Preprocessing, inference and post-processing requirements for video analytics✔ Realizing video analytics using Python, C++ API’s or using a Linux Gstreamer based pipeline✔ Optimizing models for embedded hardware with neural network accelerators✔ Deploying the video analytics solutionFind out more & register: https://lnkd.in/eDByWxYwWebinar partners: Toradex | Texas InstrumentsPresenter: Rahul Dubey#EdgeAI #AI #DoulosTraining #Webinars #TrainingWebinars #DeepLearning

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This week’s online workshop - Designing optimized FIRs with AMD Versal and Matlab📅 August 22-23 ⏰ Available worldwideIn partnership with AMD, Core-Vision B.V. and Technically Speaking - Doulos is delighted to offer you the opportunity to attend this Versal Workshop for FREE! 𝐓𝐡𝐞 𝐮𝐬𝐮𝐚𝐥 𝐜𝐨𝐬𝐭 𝐨𝐟 𝐭𝐡𝐢𝐬 𝐭𝐫𝐚𝐢𝐧𝐢𝐧𝐠 𝐰𝐨𝐮𝐥𝐝 𝐛𝐞 $990!Presented by an Authorized Trainer, with live Q&A, you will gain an understanding of designing optimized FIRs with AMD the Versal™ & Matlab. ✔ 𝐓𝐡𝐢𝐬 𝐰𝐨𝐫𝐤𝐬𝐡𝐨𝐩 𝐢𝐬 𝐬𝐮𝐢𝐭𝐚𝐛𝐥𝐞 𝐟𝐨𝐫: software and hardware developers, system architects, and anyone who wants to learn about the Versal adaptive SoC.✔ 𝐘𝐨𝐮 𝐰𝐢𝐥𝐥 𝐥𝐞𝐚𝐫𝐧 𝐚𝐛𝐨𝐮𝐭: how to effectively use the Vitis™ Model Composer tool and the Versal™ VCK190 evaluation kit to develop and verify Finite Impulse Response (FIR) filters.✔ 𝐓𝐨𝐩𝐢𝐜𝐬 𝐢𝐧𝐜𝐥𝐮𝐝𝐞: Introduction to Vitis™ Model Composer, Vitis Model Composer for AI Engines, Exploring Vitis Model Composer Examples in GitHub𝐅𝐢𝐧𝐝 𝐨𝐮𝐭 𝐦𝐨𝐫𝐞 & 𝐫𝐞𝐠𝐢𝐬𝐭𝐞𝐫👉 https://lnkd.in/eRZmbsdt#workshoponline #freeworkshop #versal #AI #Vitis

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